
8
Maxim Integrated
24-Bit, Single-Channel, Ultra-Low-Power, Delta
Sigma ADC with 2-Wire Serial Interface
MAX11202
Pin Description
Functional Diagram
Pin Configuration
TIMING
CLOCK GENERATOR
DIGITAL LOGIC
AND SERIAL-
INTERFACE
CONTROLLER
DIGITAL FILTER
(SINC4)
3RD-ORDER
DELTA-SIGMA
MODULATOR
CLK
AVDD
MAX11202
REFP
REFN
AINP
AINN
DVDD
GND
SCLK
RDY/DOUT
PIN
NAME
FUNCTION
1
GND
Ground. Ground reference for analog and digital circuitry.
2
REFP
Differential Reference Positive Input. REFP must be more positive than REFN. Connect REFP to a
voltage between AVDD and GND.
3
REFN
Differential Reference Negative Input. REFN must be more negative than REFP. Connect REFN to a
voltage between AVDD and GND.
4
AINN
Negative Fully Differential Analog Input
5
AINP
Positive Fully Differential Analog Input
6
AVDD
Analog Supply Voltage. Connect a supply voltage between +2.7V to +3.6V with respect to GND.
7
DVDD
Digital Supply Voltage. Connect a digital supply voltage between +1.7V to +3.6V with respect to
GND.
+
1
2
3
4
5
10
9
8
7
6
CLK
SCLK
DVDD
AINN
REFN
REFP
GND
MAX11202
MAX
TOP VIEW
AVDD
AINP
RDY/DOUT